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  • 99%的工程师不懂ESD器件对高速信号的影响(信号完整性分析篇)

    99%的工程师不懂ESD器件对高速信号的影响(信号完整性分析篇)

    电子产品的应用随着可见,那么电子产品的静电防护ESD成为了电子产品设计中必不可少的工作。在有外部接口的电子产品中,几乎都会有ESD防护器件。而且几乎每个芯片流片后或多或少都会有点ESD的问题,这些问题往往都出现在模拟IP上。

    高速电路设计的系统工程师或者硬件工程师必须仔细选择在设计中所需要的所有元器件,选择合适的ESD保护元件就具有比以前更大的挑战性,因为ESD器件在一些高速电路接口上已经变得不再是一个简单的ESD器件,还包含了杂散的寄生参数,以及安装到PCB板上时的寄生电感等参数。如下图左是一个典型的ESD保护器件,右图是安装在PCB板上的一个简化的等效电路图:

    ESD保护电路

    显然电路变得更加的复杂啦。这里还没有计算ESD器件的IO电容。下图是某TVS管的datasheet中标识的IO寄生电容:

    IO寄生电容

    下面以大家都非常熟知的USB3.0为例子,在ADS中搭建一个仿真的原理图(使用ADSexample即可):

    仿真获得的眼图如下图所示:

    眼图

                在原始的原理图中添加一个防ESDTVS管的S参数之后,原理图如下图所示:

    其它条件都保持与前面一样,仿真获得的眼图如下图【】所示:

    从眼图上看,两者有明显的差别,再观察其测量项,显然,带ESD器件TVS管的模型时,其结果更差。在此文中虽然结果还是符合USB3.0的规范要求,但是已经变得很差,如果在没有考虑TSV管的影响下结果就很差,那么在加上TVS管之后,很有可能就会导致结果不满足设计的要求。

    下图是一个TVS管器件的S参数:

    显然,当信号速率比较低时,其损耗比较小,但是随着速率的提升,显然损耗会变大很多。虽然目前很多公司都无法提供ESD器件的S参数,但是对于高速电路而言,这确实是需要考虑的影响因子之一。所以在选择器件时,不仅仅要看器件的防护等级,还需要注意其寄生效应。

     

     

     

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